3-5 years/Undergraduate /RTL Design/debug test/Linux system
Job Responsibility:
1. Responsible for digital front-end design and development, including RTL design and verification;
2. Define the digital module function, interface, timing and flow chart, write design documents;
3. Assist back-end designers to complete the design task together;
4. Chip debug test and analysis work;
Job Requirements:
1. Bachelor degree or above in electronic engineering, major in microelectronics and integrated circuits, electronic information engineering, electronic science and technology;
2. 1-2 years of relevant work experience is preferred;
3. With a solid theoretical foundation of digital circuits;
4. With Verilog hardware deion language programming ability;
5. Understand the process of digital circuit design, familiar with front-end EDA tools (simulation, logic synthesis, formal verification, timing analysis) is preferred;
6. Familiar with Linux system, familiar with C/C + + is good, have a certain ability to is preferred (shell/Makefile/Perl/Python);
7. Have strong learning ability, analytical ability, communication ability, and good team spirit.